Design of an FPGA-Based High-Quality Real-Time Autonomous Dehazing System

High Reliable FPGA Based System Design Methodology

This paper describes a methodology of the automatic design process for the concurrent error detection (CED) circuits based on FPGAs. Our solution assumes the possibility of dynamical reconfiguration of the faulty part. The most important criterion is the speed of the fault detection and the safety of the whole circuit with respect to the surrounding environment. Our methodology enables cooperat...

An FPGA-Based Real-Time Event Sampler

This paper presents the design and FPGA-implementation of a sampler that is suited for sampling real-time events in embedded systems. Such sampling is useful, for example, to test whether real-time events are handled in time on such systems. By designing and implementing the sampler as a logic analyzer on an FPGA, several design parameters can be explored and easily modified to match the behavi...

An Efficient LUT Design on FPGA for Memory-Based Multiplication

An efficient Lookup Table (LUT) design for memory-based multiplier is proposed.  This multiplier can be preferred in DSP computation where one of the inputs, which is filter coefficient to the multiplier, is fixed. In this design, all possible product terms of input multiplicand with the fixed coefficient are stored directly in memory. In contrast to an earlier proposition Odd Multiple Storage ...

FPGA Based Secure System Design-an Overview

The implementation of cryptographic algorithm on FPGA is highly addressed in different forums due to its paramount advantages over the other platforms. Most of the secure systems are designed using SRAM based FPGAs with additional security features provided by the manufactures. In this paper, firstly, attempts are made to address different security problems of FPGA based secure systems. The dif...

Real-Time Video Dehazing Based on Spatio-Temporal MRF